基于卷积神经网络的人脸识别及硬件实现

发布时间：2018-05-16 02:36

本文选题：人脸识别 + 卷积神经网络　；参考：《西安理工大学》2017年硕士论文

【摘要】：随着计算机科学和互联网技术的快速发展,人脸识别技术广泛的应用于如公共安全,公安、司法和刑侦,信息安全和门禁系统等各种领域,比如公安领域需要在系统人脸库中找出罪犯的相关信息,或在门禁系统中快速识别和匹配相关人员的身份信息。人脸作为稳定的、直观的、辨识度高的生物特性受到研究者愈来愈多的重视。本文对识别人数较小场合下的人脸识别进行研究,分析了各类人脸识别算法及优缺点后选择深度学习中卷积神经网络实现人脸识别。首先介绍了卷积神经网络的相关原理,然后分析了经典激活函数的特性。研究表明卷积神经网络中参数拥有大量的冗余度,选择双曲正切(tanh)作为激活函数时,网络中神经元激活数目太多,而修正线性单元(ReLU)激活函数虽然拥有稀疏激活特性,但是由于本文根据识别人数的限定设计出的网络卷积层层数为4, ReLU激活函数响应边为线性的特性在网络较小的情况下对数据拟合效果很差。本文综合两个激活函数的特性提出一种新的激活函数(newfuc),该激活函数具有一定程度的稀疏激活特性和非线性响应特征。在本文实验中对ORL人脸库、FERET人脸库和Yalefaces人脸库训练结果表示,在网络参数冗余度高的情况下,该激活函数比原激活函数具有更高的识别率,而且由于引入稀疏性,减轻了原网络参数的冗余度和算法的计算复杂度。由于卷积神经网络算法的并行性,硬件实现方式能够通过增加硬件资源,同时进行多个运算单元的计算,加速其计算过程。本文详细设计了基于卷积神经网络的人脸识别算法的硬件模块,首先将整个算法主要划分为控制模块、卷积采样模块、全连接模块和分类输出模块,其中卷积采样模块和全连接层模块提取人脸特征,分类输出模块对特征分类后输出人脸类别,控制模块协调整个硬件的正常运行。然后对每个模块用verilog语言进行RTL级描述,并用Modelsim软件进行功能仿真。验证设计逻辑功能正确并在Quartus II工具综合后下载到FPGA开发板,在开发板上验证了算法硬件实现的正确性和可行性。
[Abstract]:With the rapid development of computer science and Internet technology, face recognition technology is widely used in various fields such as public security, justice and criminal investigation, information security and access control system. For example, the public security field needs to find the relevant information of criminals in the system face database, or to identify and match the identity information of the relevant persons in the access control system. As a stable, intuitive and highly recognizable biological feature, face has attracted more and more attention. In this paper, face recognition with small number of people is studied, and all kinds of face recognition algorithms and convolution neural network in depth learning are analyzed to realize face recognition. Firstly, the principle of convolution neural network is introduced, and then the characteristic of classical activation function is analyzed. The results show that the parameters in the convolution neural network have a lot of redundancy. When the hyperbolic tangent tanh) is chosen as the activation function, the number of neurons in the network is too much, while the modified linear unit (ReLU) activation function has the characteristics of sparse activation. However, because the network convolution layer number is 4, the response edge of ReLU activation function is linear, and the effect of data fitting is very poor when the network is small. In this paper, a new activation function is proposed based on the properties of the two activation functions. The activation function has the characteristics of sparse activation and nonlinear response to a certain extent. In this experiment, the training results of ORL face database and Yalefaces face database show that the activation function has a higher recognition rate than the original activation function under the condition of high redundancy of network parameters, and because of the introduction of sparsity. The redundancy of the original network parameters and the computational complexity of the algorithm are reduced. Due to the parallelism of the convolution neural network algorithm, the hardware implementation can speed up the computing process by increasing the hardware resources and computing several computing units simultaneously. In this paper, the hardware module of face recognition algorithm based on convolution neural network is designed in detail. Firstly, the whole algorithm is divided into control module, convolution sampling module, full connection module and classification output module. The convolutional sampling module and the full connection layer module extract face features, and the classification output module outputs face categories after classifying the features, and the control module coordinates the normal operation of the whole hardware. Then each module is described at RTL level with verilog language, and the function is simulated by Modelsim software. The logic function of the design is verified and downloaded to the FPGA development board after the synthesis of Quartus II tools. The correctness and feasibility of the algorithm hardware implementation are verified on the development board.
【学位授予单位】：西安理工大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TP391.41;TP183

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